04-3.Processes and Threads - Context Switching

이 글은 서울대학교 평생교육원 열린강좌 중, 홍성수 교수님의 운영체제 강의 및 pt자료를 정리한 내용임을 알려드립니다. 
서울대학교 평생교육원 열린강좌 - 운영체제 (홍성수 교수님)

Processes and Threads

Agenda

1. Process Concepts
2. Process Scheduling
3. Context Switching
4. Process Creation and Termination
5. MultiThreading
6. Conclusion 

Context Switching

Context Switching (1)

• How does the dispatcher save and restore state?

  • Mechanism : Context switch
  • memory context : code, stack, data => 부분적
  • h/w context : cpu, i/o, register => 반드시 대피
  • sytem context : kernel process를 위한 저장내용 => 대피안함
  • 대피의 판단기준은 사라지거나 overwrite되는 것들.

• What must get saved?

  • Everything that next process could or will damage
    
    • Program counter
    • Processor status word ( condition codes, etc. )
    • General purpose registers, floating-point registers
    • All of memory?
      
      • Swapping : memory could be large so saving it could be expensive.

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Context Switching (2)

• Possibilities:
  
  • Don’t save memory
    
    • No dynamic memory management
      
      • Memory is alloated to entire batch.
    • Old batch processing system : multiprogrammed batch monitor.
    • Context switching in multithreaded process
      

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Context Switching (3)

• Save all memory to disk ( roll-in/roll-out swapping )
  * Bringing in each process entirely, running it an then putting it back on the disk,
  * so, that another program may be loaded into that space.
  * Early personal computer/workstation : DOS
  * Effective but very slow.

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Context Switching (4)

• Save part memory to disk (swapping)
  
  • Moving memory blocks of pocess between RAM and disk
    
    • swap file, swap device
  • Implemented with memory complex management mechanusms
  • Used in most of the modern OSes
    
    • UNIX or UNIX-like systems : Linux, OS X

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Implementation

• Mechine dependent
  
  • Different for MIPS, SPARC, x86, etc.
• Tricky
  
  • OS must execute code to save state without changing the process’ state
• Requires some special hardware support
  
  • Example : Save PC and PSR on trap or interrupt.

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Mechanism (1)

• Stack frames during a ontext switch (80186/80188 Small)

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Mechanism (2)

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